1. Field of the Invention
The present invention relates to a mixed-voltage I/O buffer, particularly to a mixed-voltage I/O buffer that inhibits hot-carrier degradation.
2. Description of the Related Art
With the advance of technology and science, transistors become more and more miniaturized. Thus, the allowed maximum node voltage, such as the gate-source voltage (Vgs), the gate-drain voltage (Vgd), and the drain-source voltage (Vds), should be also decreased to guarantee the lifetime of the circuit.
At present, the chips fabricated with the advanced CMOS process still have to work together with the circuits fabricated with the earlier stage CMOS process. Thus, the transmission interface of the chips is likely to receive a voltage signal greater than the normal working voltage VDD thereof. The mixed-voltage I/O (Input/Output) buffer is commonly used in the transmission interface to receive a higher voltage signal and output a lower operating voltage to satisfy the requirements of high speed and low power consumption and guarantee circuit lifetime. Further, the mixed-voltage I/O buffer is usually realized with thinner gate-oxide transistors.
Refer to FIG. 1 a diagram schematically showing the circuit of a conventional mixed-voltage I/O buffer. As shown in FIG. 1, the I/O buffer 10 receives a GND-to-2×VDD input signal (high-level voltage) and transmits a GND-to-VDD output signal (low-level voltage). The I/O buffer 10 comprises a pre-driver circuit 12, an output circuit 14, an input circuit 16 and an I/O pad 18. According to an output-enable signal OE, the pre-driver circuit 12 sends out a pull-up signal PU or a pull-down signal PD to control the output circuit 14. During the transition from receiving a 2×VDD input signal to transmitting a 0V (GND) output signal, the voltage of the I/O pad 18 is 2×VDD initially; as the NMOS transistor 144 is turned on during the transition, the source voltage of the NMOS transistor 142 is pulled down to about Vdsat (the saturated drain voltage). Thus, during the transition from receiving a 2×VDD input signal to transmitting a 0V (GND) output signal, the drain-source voltage Vds of the NMOS transistor 142 is larger than the maximum operating voltage, and the hot-carrier degradation occurs. Since the transistors feature extremely short channel length and high electric field in the deep sub-micron technologies, the hot-carrier-induced degradation becomes one of the most important reliability concerns.